BRIDGELYT · RESEARCH & OPPORTUNITIES
딥엑스 [Production] Product Yield Enhancement & Foundry Management Engineer
딥엑스 [Production] Product Yield Enhancement & Foundry Management Engineer — ㈜딥엑스 · 경력 15년 이상 · 정규직. 담당 업무·지원 자격·마감일과 공식 지원 링크를 확인하세요.
진행·예정 · 출처에서 확인한 정보이며 최종 조건은 공식 원문을 확인하세요.
한 줄 요약
딥엑스 [Production] Product Yield Enhancement & Foundry Management Engineer — 딥엑스 · ㈜딥엑스 · 경력 15년 이상 · 정규직. 현재 상태: 진행·예정.
정보 갱신일 2026-10-21
조건·일정 확인
- 기관·대학
- 딥엑스
- 지역·근무지
- ㈜딥엑스
- 고용 형태
- 정규직
- 경력
- 경력 15년 이상
- 학력
- 공식 공고 확인
담당 업무
- □ Yield ramp-up: Drive NPI yield ramp-up, addressing systematic/parametric yield, eliminate systematic defects and ensure robust product yield margin with corner lot evaluation
- □ Mass production Monitoring and Operations: Oversee trends, shifts and excursions of
- foundry WAT/PCM and production PT/FT yields using statistical methods
- □ MPW/Product Tape-out Execution: Revolve DRC violations in collaboration with Design/Foundry teams and plan Silicon execution to deliver customer samples on-time including Pavement lots, Corner splits and back up lot etc.
- □ Power-performance Optimization: Collaborate with foundry process teams to execute corner lot and DOEs to maximize product power-performance margins for mass production
- □ FA and Corrective Actions: Lead cross-functional teams to investigate the root cause of product failures and implement corrective/preventative actions
- □ Foundry management: Manage business and engineering issues including mask revision,
- excursion recovery, PCN etc.
- □ Yield Prediction & Modeling: Forecast short/long term product yield by using FAB D0 and device targeting by statistical models
우대 사항
- □ 5+ years of direct experience in sub-5nm in FinFET and beyond CMOS logic process nodes
- □ Proven track record of leading projects with global foundries (e.g., TSMC, Samsung Foundry etc.)
- □ Experiences in NPI and high-volume mass production of high-performance SoCs such as NPUs or
- GPUs.
- □ SPICE simulation for device level performance evaluation
- □ Strong communication skills in English for global collaboration.
공식 출처와 다음 단계
공식 원문 확인원천 정보 갱신: 2026. 10. 21. PM 5:06
본문에 없는 자격·금액·일정은 임의로 보완하지 않습니다. 원문과 담당 기관에서 확인하세요.
도구에서 보기·관심 저장관련 정보
딥엑스 연구·기술직 채용 · 연구·기술직 채용공고 전체 보기
연구·기술직 채용공고 · 진행·예정
딥엑스
□ Subsystem Integration: Integrate ARM or RISC-V based CPU IP into AI SoC platforms, focusing on top-level connectivity and hierarchy.
연구·기술직 채용공고 · 진행·예정
딥엑스
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연구·기술직 채용공고 · 진행·예정
딥엑스
□ IP Integration & RTL Design: Lead the integration of high-performance GPU IPs (e.g., ARM Mali, Imagination, or proprietary cores) into the SoC top-level environment.
연구·기술직 채용공고 · 진행·예정
딥엑스
□ PDN & Power Integrity Analysis: Perform comprehensive PDN analysis including DC/AC frequency-domain analysis (Target Impedance profiling) and time-domain transient simulations...