딥엑스 [HW] CPU Subsystem Engineer
딥엑스
□ Subsystem Integration: Integrate ARM or RISC-V based CPU IP into AI SoC platforms, focusing on top-level connectivity and hierarchy.
딥엑스 연구·기술직 채용: 진행·예정 채용 17건 · 주요 근무지 ㈜딥엑스. 조건·일정과 공식 원문 링크를 한곳에서 비교하세요.
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진행·예정 전체 17건 · 이번 페이지 17건
딥엑스
□ Subsystem Integration: Integrate ARM or RISC-V based CPU IP into AI SoC platforms, focusing on top-level connectivity and hierarchy.
딥엑스
Frontier of On-device AI Semiconductorsfor Everyone, EverywhereAbout DeepX Co., Ltd.DEEPX is a forward-thinking Series D startup architecting the infrastructure for t...
딥엑스
□ IP Integration & RTL Design: Lead the integration of high-performance GPU IPs (e.g., ARM Mali, Imagination, or proprietary cores) into the SoC top-level environment.
딥엑스
□ PDN & Power Integrity Analysis: Perform comprehensive PDN analysis including DC/AC frequency-domain analysis (Target Impedance profiling) and time-domain transient simulations...
딥엑스
□ Low-Power Custom & Datapath Circuit Design: Deep expertise in ultra-low-power full-custom circuit design, including dynamic/domino logic, custom transistor-level circuit topol...
딥엑스
□ Design and implement NoC architecture for high-performance AI accelerators.
딥엑스
□ Design and implementation of PCIe Controller and Link Layer logic for NPU SoCs
딥엑스
□ PHY IP Integration: Lead the design, implementation, and integration of high-speed interface PHY IPs (such as LPDDR4/5, PCIe Gen4/5, MIPI D-PHY/C-PHY, etc.) for AI semiconduct...
딥엑스
□ Verification Strategy: Define and develop comprehensive verification plans for complex SoC Interconnects and Bus structures based on architectural specifications.
딥엑스
□ ISP & MIPI Pipeline Integration: Integrate ISP (Image Signal Processor) IPs with MIPI CSI-2 interfaces to establish a seamless front-end image processing pipeline.
딥엑스
□ Video Subsystem Integration: Integrate and configure 3rd-party Video Codec IPs to handle high-resolution video streams efficiently within the AI semiconductor architecture.
딥엑스
□ Provide technical support and troubleshoot issues for clients.
딥엑스
□ Pre-Silicon Verification (SW/HW Co-design): Develop firmware and low-level test suites for SoC functional verification using FPGA prototypes and Emulation (Palladium, Zebu, et...
딥엑스
□ Yield ramp-up: Drive NPI yield ramp-up, addressing systematic/parametric yield, eliminate systematic defects and ensure robust product yield margin with corner lot evaluation
딥엑스
□ SLT HW/SW Test System Setup & Operation: Establish and operate HW infrastructure (e.g., SLT boards, sockets) and develop/maintain test SW & scripts (firmware, drivers, test sc...
딥엑스
□ System-level Integration: Integrate DEEPX NPU Runtime (RT) libraries into the Android Framework and system server.
딥엑스
Frontier of On-device AI Semiconductorsfor Everyone, EverywhereAbout DeepX Co., Ltd.DEEPX is a forward-thinking Series D startup architecting the infrastructure for t...