딥엑스 [HW/SW] SoC Platform SW Engineer

한 줄 요약

딥엑스 [HW/SW] SoC Platform SW Engineer — 딥엑스 · ㈜딥엑스 · 경력 3~30년 · 정규직. 현재 상태: 진행·예정.

정보 갱신일 2026-10-21

조건·일정 확인

기관·대학

딥엑스

지역·근무지

㈜딥엑스

고용 형태

정규직

경력

경력 3~30년

학력

공식 공고 확인

담당 업무

• □ Pre-Silicon Verification (SW/HW Co-design): Develop firmware and low-level test suites for SoC functional verification using FPGA prototypes and Emulation (Palladium, Zebu, etc.).
• □ Post-Silicon Bring-up: Lead the initial power-on and functional "bring-up" of new ASIC silicon, ensuring the hardware blocks (CPU, NPU, Peripherals) communicate correctly.
• □ Hardware-Level Diagnostic SW: Design and implement diagnostic software to stress-test hardware components and identify design flaws or manufacturing defects.
• □ Bare-metal & RTOS Development: Develop core boot-code, hardware abstraction layers (HAL), and low-level drivers in non-OS or RTOS environments.
• □ Architecture Collaboration: Work with RTL designers to define register maps, interrupt handling, and memory-mapped I/O (MMIO) structures.
• □ Performance Profiling: Measure and optimize hardware-level bottlenecks (latency, throughput) before the hand-off to the general SW team.

우대 사항

• □ RTL Familiarity: Ability to read and understand Verilog or SystemVerilog code to debug hardware-software interface issues.
• □ Scripting: Proficiency in Python or Perl for automating hardware test sequences and data analysis.
• □ Interface Expertise: Deep knowledge of SoC subsystems: PCIe, LPDDR4/5, MIPI, or high-speed SerDes.
• □ Emulation Platforms: Experience with hardware emulation (Veloce, ZeBu) or virtual platforms (SystemC/TLM).

공식 출처와 다음 단계

원천 정보 갱신: 2026. 10. 21. PM 5:06

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